Makefile smartness:

I want to prevent the dependency generation for the non-build make calls. There is 'make DRY_RUN=yes help' to achieve that, but this is not convenient and anyone calling 'make help' for the first time does not yet have a clue about such a variable. This works for the configure script, but not for humans.

What can I do there? I want two things:
1. Do not build/include dependencies unless a build is to be done (so, target is anything but a member of a restricted set (info, help, clean, allclean (as long as I don't make clean use a target list prepared by the deps)).
2. Let command line flags override stored config.mk ... and store a new config.mk .

Is the latter possible? Command line variables override values from config.mk ... one has to store the current config and compare ... I can define a confcheck target that does that comparison and updates config.mk; but I have to tell make that this can change config.mk, without intriducing a logic circle.
Confcheck has to be called once for each make run ... for each run that wants to build anything, at least. How so?

Ah, crap. Why so complicated? The user can just as well hack config.mk or delete it to really change things, including rebuilding stuff. I will document the current logic and that'll be it.

The first point is more interesting; for usability, the dependencies should generated only if the user really is prepared to build. This is the case if 'make' is called with a target not on the special list.
But heck, I don't quite figure how to do that without getting ugly with repeated calls from the Makefile on itself. Let's drop that. One can use the 'configure && make' interface, which sets DRY_RUN.
